Reuse Methodology Manual for System-on-a-Chip Designs For System-on-a-chip Designs
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Seller Comments: Hardcover, [xviii], 291 pages. Near Fine condition. Third edition. Size 9.5"x6.25". "Silicon and tool technologies move so quickly that many of the details of design-for-reuse will undoubtedly continue to evolve over time. But the fundamental aspects of the methodology described in this book have become widely adopted and are likely to form the foundation of chip design for some time to come. . . . Features of the Third Edition: Up to date; State of the art; Reuse as a solution for circuit designers; A chronicle of 'best practices'; All chapters updated and revised; Generic guidelines - non tool specific; Emphasis on hard IP and physical design." Book has light exterior shelfwear. Previous owner's name blacked-out on top edge, text else Fine condition, clean and unmarked. Availability: Ships 2-3 days |
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Seller Comments: USED book in GOOD condition. Great binding pages and cover show normal signs of wear from use. Availability: Ships 2-3 days |
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Availability: Ships 2-3 days |
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Seller Comments: Hardcover, [xviii], 291 pages. Near Fine condition. Third edition. Size 9.5"x6.25". "Silicon and tool technologies move so quickly that many of the details of design-for-reuse will undoubtedly continue to evolve over time. But the fundamental aspects of the methodology described in this book have become widely adopted and are likely to form the foundation of chip design for some time to come. . . . Features of the Third Edition: Up to date; State of the art; Reuse as a solution for circuit designers; A chronicle of 'best practices'; All chapters updated and revised; Generic guidelines - non tool specific; Emphasis on hard IP and physical design." Book has light exterior shelfwear. Previous owner's name blacked-out on top edge, text else Fine condition, clean and unmarked. Availability: Ships 2-3 days |
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Availability: On-Demand |
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Ships 2-3 days |
Used
Ships 2-3 days |
$55.00 | $5.50 | $60.50 | |||||
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Seller Comments: Hardcover, [xviii], 291 pages. Near Fine condition. Third edition. Size 9.5"x6.25". "Silicon and tool technologies move so quickly that many of the details of design-for-reuse will undoubtedly continue to evolve over time. But the fundamental aspects of the methodology described in this book have become widely adopted and are likely to form the foundation of chip design for some time to come. . . . Features of the Third Edition: Up to date; State of the art; Reuse as a solution for circuit designers; A chronicle of 'best practices'; All chapters updated and revised; Generic guidelines - non tool specific; Emphasis on hard IP and physical design." Book has light exterior shelfwear. Previous owner's name blacked-out on top edge, text else Fine condition, clean and unmarked. Availability: Ships 2-3 days |
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Seller Comments: USED book in GOOD condition. Great binding pages and cover show normal signs of wear from use. Availability: Ships 2-3 days |
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